1. Technical Field
Various embodiments relate to a semiconductor apparatus, and more particularly, to a noise elimination circuit of a semiconductor apparatus.
2. Related Art
A semiconductor apparatus may use various signals for the operation control thereof, for example, a pulse-type signal and a level signal.
The level signal may be a signal which retains a high level or a low level until a variation in an input condition occurs.
A conventional level signal processing circuit 10 will be exemplarily described with reference to FIG. 1.
As shown in FIG. 1, the level signal processing circuit 10 includes a plurality of flip-flops (F/F) 11, 12, 13 and 15, and a decoder 14.
The plurality of respective flip-flops 11 to 13 latch input signals A to C according to a clock signal CLK and generate output signals FF1 to FF3.
The decoder 14 decodes the output signals FF1 to FF3 and generates a level signal LS.
The flip-flop 15 latches an input signal D according to a clock signal CLK2 and generates an output signal FF_OUT.
In the flip-flop 15, the output signal FF_OUT may be initialized to, for example, a low level, in response to the level signal LS.
Referring to FIG. 2, in the case of a normal operation, the output signals FF1 to FF3 should have the same timing.
However, in an actual operation, any one of the output signals FF1 to FF3, for example, the output signal FF2 may be abnormally generated or may have erroneous timing due to a variation in PVT (process/voltage/temperature).
In the case where the output signals FF1 to FF3 have the same timing, the level signal LS may be retained to, for example, a high level.
However, if the output signal FF2 has different timing as mentioned above, the level signal LS may not have a normal level and may be generated in the type of noise, that is, a glitch, which is problematic.
In this way, in the case where the level signal LS does not have a normal level and is generated in the glitch type, the flip-flop may be abnormally initialized.
Accordingly, a problem is likely to be caused in that the output signal FF_OUT of the flip-flop 15 may have an erroneous level, that is, a level different from a desired level.